Prior packet switching arrangements usually included so-called first in first out (FIFO) memories into which packets were supplied. The input ports typically controlled which output ports would receive the packets. One serious problem in such arrangements is that if an input port has a packet in a FIFO which is to be supplied to particular output port that is presently occupied, or transmitting another packet from another input port, all subsequent packets in that particular packet input port FIFO have to wait until the prior packet has been supplied to the busy output port. Consequently, packets destined for other output ports which are not busy must wait and, therefore, there is lower throughput in the switch.